CPU features from EDX register. More...

#include <cpuid_0x01h.h>

Public Attributes
uint8_t	fpu: 1
	Onboard x87 FPU. More...

uint8_t	vme: 1
	Virtual 8086 mode extensions (such as VIF, VIP, PIV) More...

uint8_t	de: 1
	Debugging extensions (CR4 bit 3) More...

uint8_t	pse: 1
	Page Size Extension. More...

uint8_t	tsc: 1
	Time Stamp Counter. More...

uint8_t	msr: 1
	Model-specific registers. More...

uint8_t	pae: 1
	Physical Address Extension. More...

uint8_t	mce: 1
	Machine Check Exception. More...

uint8_t	cx8: 1
	CMPXCHG8 (compare-and-swap) instruction. More...

uint8_t	apic: 1
	Onboard Advanced Programmable Interrupt Controller. More...

uint8_t	__pad0__: 1

uint8_t	sep: 1
	SYSENTER and SYSEXIT instructions. More...

uint8_t	mtrr: 1
	Memory Type Range Registers. More...

uint8_t	pge: 1
	Page Global Enable bit in CR4. More...

uint8_t	mca: 1
	Machine check architecture. More...

uint8_t	cmov: 1
	Conditional move and FCMOV instructions. More...

uint8_t	pat: 1
	Page Attribute Table. More...

uint8_t	pse_32: 1
	36-bit page size extension More...

uint8_t	psn: 1
	Processor Serial Number. More...

uint8_t	clfsh: 1
	CLFLUSH instruction (SSE2) More...

uint8_t	__pad1__: 1

uint8_t	ds: 1
	Debug store: save trace of executed jumps. More...

uint8_t	acpi: 1
	Onboard thermal control MSRs for ACPI. More...

uint8_t	mmx: 1
	MMX instructions. More...

uint8_t	fxsr: 1
	FXSAVE, FXRESTOR instructions, CR4 bit 9. More...

uint8_t	sse: 1
	SSE instructions (a.k.a. Katmai New Instructions) More...

uint8_t	sse2: 1
	SSE2 instructions. More...

uint8_t	ss: 1
	CPU cache implements self-snoop. More...

uint8_t	htt: 1
	Hyper-threading. More...

uint8_t	tm: 1
	Thermal monitor automatically limits temperature. More...

uint8_t	ia64: 1
	IA64 processor emulating x86. More...

uint8_t	pbe: 1
	Pending Break Enable (PBE# pin) wakeup capability. More...

Detailed Description

CPU features from EDX register.

Member Data Documentation

◆ pad0

uint8_t cpuid_0x01h_edx_fields::__pad0__

◆ pad1

uint8_t cpuid_0x01h_edx_fields::__pad1__

◆ acpi

uint8_t cpuid_0x01h_edx_fields::acpi

Onboard thermal control MSRs for ACPI.

◆ apic

uint8_t cpuid_0x01h_edx_fields::apic

Onboard Advanced Programmable Interrupt Controller.

◆ clfsh

uint8_t cpuid_0x01h_edx_fields::clfsh

CLFLUSH instruction (SSE2)

◆ cmov

uint8_t cpuid_0x01h_edx_fields::cmov

Conditional move and FCMOV instructions.

◆ cx8

uint8_t cpuid_0x01h_edx_fields::cx8

CMPXCHG8 (compare-and-swap) instruction.

◆ de

uint8_t cpuid_0x01h_edx_fields::de

Debugging extensions (CR4 bit 3)

◆ ds

uint8_t cpuid_0x01h_edx_fields::ds

Debug store: save trace of executed jumps.

◆ fpu

uint8_t cpuid_0x01h_edx_fields::fpu

Onboard x87 FPU.

◆ fxsr

uint8_t cpuid_0x01h_edx_fields::fxsr

FXSAVE, FXRESTOR instructions, CR4 bit 9.

◆ htt

uint8_t cpuid_0x01h_edx_fields::htt

Hyper-threading.

◆ ia64

uint8_t cpuid_0x01h_edx_fields::ia64

IA64 processor emulating x86.

◆ mca

uint8_t cpuid_0x01h_edx_fields::mca

Machine check architecture.

◆ mce

uint8_t cpuid_0x01h_edx_fields::mce

Machine Check Exception.

◆ mmx

uint8_t cpuid_0x01h_edx_fields::mmx

MMX instructions.

◆ msr

uint8_t cpuid_0x01h_edx_fields::msr

Model-specific registers.

◆ mtrr

uint8_t cpuid_0x01h_edx_fields::mtrr

Memory Type Range Registers.

◆ pae

uint8_t cpuid_0x01h_edx_fields::pae

Physical Address Extension.

◆ pat

uint8_t cpuid_0x01h_edx_fields::pat

Page Attribute Table.

◆ pbe

uint8_t cpuid_0x01h_edx_fields::pbe

Pending Break Enable (PBE# pin) wakeup capability.

◆ pge

uint8_t cpuid_0x01h_edx_fields::pge

Page Global Enable bit in CR4.

◆ pse

uint8_t cpuid_0x01h_edx_fields::pse

Page Size Extension.

◆ pse_32

uint8_t cpuid_0x01h_edx_fields::pse_32

36-bit page size extension

◆ psn

uint8_t cpuid_0x01h_edx_fields::psn

Processor Serial Number.

◆ sep

uint8_t cpuid_0x01h_edx_fields::sep

SYSENTER and SYSEXIT instructions.

◆ ss

uint8_t cpuid_0x01h_edx_fields::ss

CPU cache implements self-snoop.

◆ sse

uint8_t cpuid_0x01h_edx_fields::sse

SSE instructions (a.k.a. Katmai New Instructions)

◆ sse2

uint8_t cpuid_0x01h_edx_fields::sse2

SSE2 instructions.

◆ tm

uint8_t cpuid_0x01h_edx_fields::tm

Thermal monitor automatically limits temperature.

◆ tsc

uint8_t cpuid_0x01h_edx_fields::tsc

Time Stamp Counter.

◆ vme

uint8_t cpuid_0x01h_edx_fields::vme

Virtual 8086 mode extensions (such as VIF, VIP, PIV)

The documentation for this struct was generated from the following file:

os/kernel/src/cpu/cpuid/headers/cpuid_0x01h.h

Public Attributes