MicrOS
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Intel thread/core and cache topology. More...
#include <cpuid_0x04h.h>
Public Attributes | |
uint8_t | cache_type_field: 5 |
Cache Type Field. More... | |
uint8_t | cache_level: 3 |
Cache Level (starts at 1). More... | |
uint8_t | self_init_cache_level: 1 |
Self Initializing cache level (does not need SW initialization). More... | |
uint8_t | fully_associative_cache: 1 |
Fully Associative cache. More... | |
uint8_t | __pad0__: 4 |
uint16_t | max_num_addressable_ids_logical: 12 |
Maximum number of addressable IDs for logical processors sharing this cache. More... | |
uint8_t | max_num_addressable_ids_physical: 6 |
Maximum number of addressable IDs for processor cores in the physical package. More... | |
Intel thread/core and cache topology.
uint8_t cpuid_0x04h_eax_fields::__pad0__ |
uint8_t cpuid_0x04h_eax_fields::cache_level |
Cache Level (starts at 1).
uint8_t cpuid_0x04h_eax_fields::cache_type_field |
Cache Type Field.
Type | Encoding in Binary |
---|---|
No more caches. | 0 |
Data Cache. | 1 |
Instruction Cache. | 2 |
Unified Cache. | 3 |
Reserved. | 4 - 31 |
uint8_t cpuid_0x04h_eax_fields::fully_associative_cache |
Fully Associative cache.
uint16_t cpuid_0x04h_eax_fields::max_num_addressable_ids_logical |
Maximum number of addressable IDs for logical processors sharing this cache.
Add one to the return value to get the result.
uint8_t cpuid_0x04h_eax_fields::max_num_addressable_ids_physical |
Maximum number of addressable IDs for processor cores in the physical package.
Add one to the return value to get the result.
uint8_t cpuid_0x04h_eax_fields::self_init_cache_level |
Self Initializing cache level (does not need SW initialization).